December 23rd, 2016, San Jose, CA – Arastu Systems, a company that specializes in developing IPs in the Memory and Networking area today announced the immediate availability of their LPDDR3 DRAM Memory Controller along with LPDDR4, that is optimized for FPGA and ASIC designs. It is designed specifically to cater the industry demand for LPDDR memories, which delivers increased performance at very lower power consumption, in contrast to predecessors.
The controller is fully compliant with JEDEC standard JESD209-3C and partner’s DFI PHY or DFI 3.1 PHY from any other vendor. The IP core supports various power down modes including ‘Deep Power Down’ which makes it to be an optimum choice for devices such as Smartphones, Tablets, Ultrabook, where performance is driven by increase in battery life. The core also supports multiple channels with a privilege to configure and manage each channel independently and parameterized data width.
Moreover, Arastu Systems offers valuable add-on cores such as ARM compatible interfaces, TRR, Test/Debug bus etc. which can be leveraged by customers based on their needs. Handheld gadgets such as Gaming consoles also utilizes LPDDR3 memories, as faster response rate is necessary for enhanced performance. Arastu’s LPDDR3 Controller suffices their needs. Additionally, if required, the solution is also available in combo format with LPDDR3 and LPDDR4 Single Joint DRAM Controller, which gives customers the flexibility to utilize either DRAM memory.
“Fresh approach was needed to improve performance of each system by reducing latency and utilizing DRAM bus bandwidth without increasing power consumption” says Umesh Patel, Founder and CEO of Arastu Systems. “Our LPDDR solutions can assist our customers make an easy transition”.
To learn more about the product, please visit, http://www.arastusystems.com/products/lpddr3-dram-memory-controller/ or you can also reach us at, email@example.com.
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