August 4th, 2016, San Jose, CA – Arastu Systems, a company that specializes in developing IPs in the Memory and Networking area today announced the immediate availability of an optimized DDR3/4 DRAM Controller Core, which gives users the flexibility to choose DRAM memories that fits best into their needs.
Dual DRAM Controller is designed as per respective JEDEC standards and works seamlessly with DFI 3.1 compatible PHY. The core is developed using standard synthesizable RTL and supports all key DDR3/DDR4 features and additional features like Error Correction Code (ECC) generation/checking, multiple power modes to reduce power consumption, intelligent scheduler to improve memory throughput, CRC computation, Parity detection, various frequency ratios and performance up to 3200 MT/s. This makes it an optimum solution for applications which require a combination of higher performance, more bus bandwidth and high reliability.
Arastu’s DDR3/4 DRAM Controller Core is best suitable for system designers who are in the early stages of planning and are skeptic about performance requirements. The solution can also be used for multiple purposes, as the user has the privilege to configure the IP by parameter for DDR3/4, based on which the hardware of the controller is generated.
“Our customers are faced with a challenge during the initial phase of chip design to choose either DDR3 or DDR4, as it is imperative to meet a maximum performance threshold while keeping in mind the memory cost” said Umesh Patel, Founder and CEO, Arastu Systems. “Our IP solution makes it easy for them, as it gives the flexibility to test and validate the system need without compromising on the cost and performance”.
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